VLSI Design and Technology MCQ with Answer [81-100].

81. Silicon oxide is patterned on a substrate using ........

A) Chemical lithography
B) Physical lithography
C) Mechanical lithography
D) Photo lithography

... Answer is D)
Explanation: Silicon oxide is patterned on a substrate using Photolithography.

---

82. The ....... is used to reduce the resistivity of poly silicon.

A) Doping impurities
B) Etching
C) Photoresist
D) None of the above

... Answer is A)
Explanation: The resistivity of poly silicon is reduced by Doping impurities.

---

83. What is Lithography?

A) Process used to develop an oxidation layer on the chip
B) Process used to transfer a pattern to a layer on the chip
C) Process used to produce the chip
D) Process used to develop a metal layer on the chip

... Answer is B)
Explanation: Lithography is the process used to develop a pattern to a layer on the chip.

---

84. After an initialization phase, the simulator enters the ....... phase.

A) Elaboration
B) Compilation
C) Execution
D) None of the above

... Answer is C)
After an initialization phase, the simulator enters the execution phase.

---

85. In composite data type of VHDL, the record type comprises the elements of ........ data types.

A) Different
B) Same
C) Both A &
D) None of the above

... Answer is A)
In composite data type of VHDL, the record type comprises the elements of different data types.

---

86. Which among the following wait statement execution causes the enclosing process to suspend and then wait for an event to occur on the signals?

A) Wait on clock until answer > 80
B) Wait until Clk = ‘1’
C) Wait on x,y,z
D) Wait for 12 ns

... Answer is C)
Wait on x,y,z

---

87. In floorplanning, placement and routing are ........ tools.

A) Front end
B) Back End
C) Both A & B
D) None of the above

... Answer is B)
In floorplanning, placement and routing are back end tools

---

88. Which among the following is/are not suitable for in-system programming?

A) EEPROM
B) EPROM
C) Flash
D) All of the above

... Answer is B)
No explanation.

---

89.Simple Programmable Logic Devices (SPLDs) are also regarded as ..........

A) Programmable Logic Array (PLA)
B) Programmable Array Logic (PAL)
C) Generic Array Logic (GAL)
D) All of the above

... Answer is D)
No explanation.

---

90. In signal integrity, which noise/s occur/s due to impedance mismatch, stubs, vias and other interconnection discontinuities?

A) Crosstalk Noise
B) Power/Ground Noise
C) Reflection Noise
D) None of the above

... Answer is C)
Reflection Noise

91. In DIBL, which among the following is/are regarded as the source/s of leakage?

A) Junction leakage
B) Subthreshold conduction
C) Gate leakage
D) All of the above

... Answer is D)
No Explanation

---

92. In enhancement MOSFET, the magnitude of output current ........... due to an increase in the magnitude of gate potentials.

A)Decreases
B) Increases
C) Remains constant
D) None of the above

... Answer is B)
In enhancement MOSFET, the magnitude of output current increses due to an increase in the magnitude of gate potentials.

---

93. Which among the following is/are regarded as an/the active resistor/s?

A) MOS transistor
B) MOS diode
C) MOS Switch
D) None of the above

... Answer is B)
No Explanation.

---

94. To grow the polysilicon gate layer, which of the following chemical is used for chemical vapour deposition?

A) Silane gas(SiH4)
B) Silicon oxide
C) Silicon Nitride(Si3N4)
D) None of the above

... Answer is A)
Explanation: Silicon Wafer is placed in a reactor with silane gas (SiH4), and they are heated again to grow the polysilicon layer by chemical vapor deposition.

---

95. The process by which Aluminium is grown over the entire wafer, also filling the contact cuts is?

A) Chemical vapour deposition
B) Ion Implantation
C) Sputtering
D) Epitaxial growth

... Answer is C)
Explanation: Aluminum is sputtered over the entire wafer, it also fills the contact cuts.

---

96. Chemical Mechanical Polishing is used to ......

A)Remove silicon nitride and pad oxide
B) Remove polysilicon gate layer
C) Reduce the size of the layout
D) None of the above

... Answer is A)
Explanation: The pad oxide and nitride are removed using a Chemical Mechanical Polishing (CMP) step.

---

97. Ids depends on ........

A) Vdd
B) Vg
C) Vds
D) Vss

... Answer is C)
Explanation: Ids depends on both Vgs and Vds. The charge induced is dependent on the gate to source voltage Vgs also charge can be moved from source to drain under influence of electric field created by Vds.

---

98. Transit time can be given by ..........

A) L / V
B) V / L
C) v x L
D) v x d

... Answer is A)
Explanation: Transit time (Ʈ) can be given by lenght of channel(L) by velocity(v). Transit time is the time required for an electron to travel between two electrodes..

---

99. Ids can be given by ........

A) Qc / 2Ʈ
B) Qc / Ʈ
C) Qc x Ʈ
D) Ʈ / Qc

... Answer is B)
Explanation: Ids can be given as charge induced in the channel(Qc) divided by transit time (Ʈ). Ids is equivalent to (-Isd)..

---

100. Which concept proves to be beneficial in acquiring concurrency and order independence?

A) Alpha delay
B) Beta delay
C) Gamma delay
D) Delta delay

... Answer is D)
No Explanation.

Next Page : 1   2   3   4   5   6   7   8   9   10