VLSI Design and Technology MCQ (Multiple Choice Question) and their answer.
VLSI design and technology is a subject of electronics and telecommunication engineering. Here we covered total 200+ MCQ of VLSI design and technology with answer.
1. Which among the following serves as an input stage to most of the op-amps due to its compatibility with IC technology?
Differential Amplifier
2. High observability indicates that ....... number of cycles are required to measure the output node value.
High observability indicates that less number of cycles are required to measure the output node value
3. Basically, an observability of an internal circuit node is a degree to which one can observe that node at the _______ of an integrated circuit.
Ouputs
4. ....... is used to deal with effect of variation.
Explanation: Designers must simulate multiple fabrication process or use system level technique for dealing with effects of variation.
5. Medium scale integration has
Explanation: Small scale integration has one or more logic gate. Further improved technology is medium scale integration which consists of hundred logic gates. Large scale integration has thousand logic gates.
6. VLSI technology uses ..... to form integrated circuit.
Explanation: Very large scale integration is the process of creating an integrated circuit with thousands of transistors into one single chip.
7. As die size shrinks, the complexity of making the photomasks .......
Explanation: As the die size shrinks due to scaling, the number of die per wafer increases and the complexity of making the photomasks increases rapidly.
8. Due to the limitations of the testers, the functional test is usually performed at speed ...... the target speed.
Lower than
9. The difficulty in achieving high doping concentration leads to ......
Explanation: As photolithography comes closer to the fundamental law of optics, achieving high accuracy in doping concentration becomes difficult, which leads to error due to variation.
10. Which among the following is/are responsible for the occurrence of 'Delay Faults'?
All of the above
11. Which among the following is a process of transforming design entry information of the circuit into a set of logic equations?
Synthesis is a process of transforming design entry information of the circuit into a set of logic equations
12. What is the design flow of VLSI system?
i. architecture design
ii. market requirement
iii. logic design
iv. HDL coding
Explanation: The order of the design flow of VLSI circuit is market requirement, architecture design, logic design, HDL coding and then verification.
13. Physical and electrical specification is given in ..........
Explanation: Functional design defines the major functional units of the system, interconnections, physical and electrical specifications.
14. The utilization of CAD tools for drawing timing waveform diagram and transforming it into a network of logic gates is known as ......
The utilization of CAD tools for drawing timing waveform diagram and transforming it into a network of logic gates is known as waveform editor.
15. ...... is used in logic design of VLSI.
Explanation: First in first out (FIFO) technique and finite state machine technique is used in the logic design of the VLSI circuits.
16. ......... architecture is used to design VLSI.
Explanation: SoC that is system on a chip architecture is used to design the very high level integrated circuit.
17. ........... is the fundamental architecture block or element of a target PLD.
Logic cell is the fundamental architecture block or element of a target PLD.
18. Among the VHDL features, which language statements are executed at the same time in parallel flow?
Concurrent language statements are executed at the same time in parallel flow.
19. Which provides higher integration density?
Explanation: Transistor-transistor logic offers higher integration density and it became the first integrated circuit revolution.
20. In VLSI design, which process deals with the determination of resistance & capacitance of interconnections?
Extraction process deals with the determination of resistance & capacitance of interconnections
